CB PLL data book/en/Section III: PLL chip specifications
This section contains specific information for almost every PLL chip ever used in CB radios. A few very old devices were omitted; your chances of ever seeing them are nil. However I have included some other obsolete chips because there are still radios out there using them that may need repair or modification if encountered. It will become obvious by the amount of space devoted to each chip which ones have survived with the greatest popularity.
First we’ll illustrate the actual in tern al w orkings of the IC chip itself. All the various sub-circuits of m odern PLLs are show n in block diagram form, followed by a detailed definition of pin function term inology. Any time you’re referring to a specific chip, you’ll understan d at a glance which pin is which. And if you should happen to get the a ctu al d a ta sheets from the m anufacturer, you’ll be equipped to figure out his p articu lar term inology an d circuitry.
There are special pages showing the internal -~ Nnum bers for the most common ROM chips. I've included this to help you better understand how the new er “state-of- th e-art” devices function in the overall PLL circuit. For example, knowing the N-Code for a specific channel and mode, and the divisor of the Reference Divider, you can calculate the VCO frequencies for that channel. This may be very useful for repair work because few m anufacturers these days bother to provide anything but the most crude, unreadable schematic diagrams!
Chassis block diagrams for the most numerous and popular PLL circuits are show n next, in alp habetical order by chip m an u factu rers’ letter prefix. Signal m ixing and flow direction, program m ing, and V C O /IF frequencies are included, as well as general SSB offsets, C larifiers, an d FM connection points. These serve to teach you in the most direct way how to isolate a problem or modification area of the PLL circuit. Remember that hese diagrams are purposely very oversimplified; I’ve assum ed you read the text of Sections I & II first! When used along with a service manual, schematic, or SAMS Fotofacts, any of these circuits can be understood.
Finally, each specific chip is described in great detail, again in alphabetical order by letter prefix. Often the device is made by several manufacturers, which may be agreat help in finding a replacement for repair. Most pin functions were determined either from manufacturers’ spec sheets or a careful study and cross-reference of known chassis. (I have thousands of rig diagrams in my files!)
In a few cases of very old chips, no data sheets were ever available, so pin functions were determ ined by studying the schem atics. Therefore a few functions m ay not be defined exactly but all the most popular, current PLL chips are well-documented. Also included is a list of every rig model know n to use the chip at press tim e. In some cases they are further identified by reference to one of the block m ixing diagram s. If your rig is n ’t listed, chances are th a t it’s identical to one th a t is; there are h ard ly an y new ch assis being produced these days, even in the U.K. The only differences are the “m an u factu rer’s” model num ber and some cosmetic changes in the cabinet. For the better-know n U niden and C ybernet chassis, actual PC board num bers are included when known. PC board num bers m ay vary slightly from those show n since there are m inor changes in production runs.
Explanation of pin function terms
| VCC or VDD | This is the + DC supply voltage which actually provides the operating power to the chip, and is generally in the range of 4-8 volts. |
| GND or VSS | This is the DC power ground connection for the above. NOTE: A chip may be found to have one or more of its functional pins tied to either of the above sources. This may be done to enable a specific function by connecting that function to a “ 1” or “0”, or to prevent an unused function pin from “floating” unconnected to prevent a possible change in its logic state. |
| RI | Reference Oscillator input. This is where the (usually) 10.240 MHz crystal is connected. Crystal pins sometimes called “X” by the manufacturer. |
| RO | Reference O scillator output. In most chips the crystal is simply connected across RI and RO because the chip has a built-in oscillator circuit which only requires some external capacitors. However some chips such as the PLL02A don’t have the built-in oscillator; thus there is no RO pin and an active transistor oscillator is required externally which connects to RI. |
| 1/2R | A built-in ÷2 circuit which provides an output of half the 10.240 MHz Reference Oscillator frequency, or 5.12 MHz. If used, it norm ally connects to a tripler circuit to provide a 15.360 MHz signal (5.12 MHz x 3) which can be used for loop mixing with the 16 MHz VCO. This mixing provides a low-frequency signal input or downmix to the Programmable Divider. |
| RB | Buffered output of the 10.240 MHz Reference Oscillator. This signal if present can be used for mixing with the 10.695 MHz receiver first IF or mixing with the 16 MHz VCO during TX mode to provide the 455 KHz second IF (RX) or the direct on-channel TX frequency. |
| FIN | Input to the Programm able Divider which is coming from the output of the VCO.
Sometimes called “P I” (Programmable Input) or “DI” (Divider Input) by some m anufacturers. This is the actual downmix signal or direct VCO signal in the faster chips which will be compared to the Reference Divider’s output in the Phase Detector. It is the change in this signal’s frequency which forces the Phase Detector and VCO to correct until the loop locks. |
| DO | Phase Detector output. Sometimes called “PO” or “PDOUT” (Phase Output) or “EO” (Error Output) by some m anufacturers. This is the output which results from com paring RI and FIN. If the two inputs don’t match exactly, this circuit sends a DC correction output to the Loop Filter/V CO until the loop corrects itself and locks up. |
| LD | Lock Detector. Sometimes called “LM” (Lock Monitor) by some manufacturers. This is a second output of the Phase Detector which is used to kill the transm itter (and sometimes the receiver) if the loop is not locked and operating correctly. Some chips have more than one Lock Detector pin and thus you’ll sometimes see “LD1 ” and “LD2” on the specs. When two Lock Detectors are used, their norm al outputs are usually opposite logic states; i.e., one LD is normally “ 1” and the other is norm ally “0” . This is a convenient design feature which allows the m anufacturer some flexibility because he can have a choice of inhibiting circuits; some work with LOW outputs, some work with HIGH outputs. Some rigs use both LD pins in their circuits. |
| MC | Misprogram Code Detector. The same idea as the Lock Detector, this is found in the newer ROM chips. If you try to force an illegal program code on the chip, this pin is activated and will kill the transm itter, receiver, or in some cases, call up Ch.9 or C h.19 instead. |
| T /R | Transmit/Receive switch. As explained in Section I, this is used to provide the 455 KHz offset for the receiver’s second IF stage in dual-conversion AM or FM rigs. Pressing the mike button changes this pin’s logic state to its opposite state from the RX Mode. This shifts the ROM controlling the Programm able Divider, and in some chips also shifts the output of the Reference Divider from standard 5 KHz steps to 2.5 KHz steps. The T /R shift is the reason you’ll see two different sets of N-Codes and VCO frequencies in a rig’s service m anual or SAMS Fotofacts. NOTE: Some m anufacturers’ chip spec sheets show a bar ( ) above some pin functions, such as LM, T/R, etc. This bar is a digital logic symbol which indicates w hat state (“ 1” or “0”) that pin is in when activated. For example, the T /R with the bar notation means that the pin is normally HIGH (“ 1”) in the Receive Mode and normally LOW (“0”) in the Transm it Mode. LM means the Lock Monitor is “active LOW”; i.e., it is normally HIGH hut goes LOW if the loop is unlocked. |
| FS | Frequency Select. This is a feature of some chips which allows them to synthesize frequencies in either 10 KHz CB steps, or 5 KHz steps. Remember, some older chips such as the PLL02A were intended for other uses besides CB, such as VHF marine radios, aircraft radios, etc., where 5 KHz channel spacing is common. In addition, this feature often makes it easier to synthesize SSB frequencies as well as AM/FM although the feature h asn ’t been used much for this. Depending upon whether the chip has an internal pull-up or pull-down resistor here, it is generally connected to produce 10 KHz CB spacings in the older chips. The newer chips having a T /R shift m ust use the 5 KHz spacing when the T /R pin is also used. IMPORTANT: You can’t use this function to get 5 KHz channel spacings, because the Program m able divider must also change to match the spacing. |
| AI, AO | Active Loop Filter Amplifier input and output. This circuit if present is used to smooth out the digital waveform coming from the Phase Detector, before it’s applied to the VCO. (See text.) This filter is found in the newer CB-only chips. The older chips (Eg, PLL02A) require external passive filters using capacitors and resistors. In m any rigs you’ll find th at these pins are connected either directly or through a resistor so th at they are placed in series between the Phase Detector output pin and the VCO input. |
| FIL | Active filter. We’re using this designation in certain very old chips when the exact spec sheets are not available but it’s known from studying the chip’s wiring in the rig th at the pins are in fact part of a loop filter. |
| T & Q | This is a wave-shaping circuit found in a few NEC chips (uPD2810, uPD2814, uPD2816, and uPD2824). It adds design flexibility but is often not even connected. This circuit consists of an input amplifier and a “flip-flop”, and its purpose is to change a sine-wave input (T) to a square-wave output (Q) which is more compatible with digital electronic circuits. |
| P0...P10 | Program Select pins from Channel Selector switch. (Sometimes called “D” for “D ata” rather than “P ” for “Program ”.) These pins control the actual channel selection, as explained in Section II. They may control selection through straight binary coding, BCD, or ROM. The sub-numbers indicate the weight or significance of each pin. For example if there were 8 program m ing pins, P j to Pg, P j would be in the “least significant bit” and Pg would be the “most significant bit”. The higher the sub-number, the greater the weight of th at pin. |
| NC | No Connection. An unused pin. May actually be disconnected inside the chip, or simply not used for th a t particular rig’s PLL circuit. |
The intercal ÷ N-codes of the newer ROM chips
Shown here are partial charts for the latest ROM PLL chips w hich will give you an idea of what is actually going on inside the Reference and Programmable Dividers. It won’t help you a bit as far as modifications, but it will help your overall understanding of the chips and their functions within the rig. Refer also to the chassis mixing diagrams for these chips shown later in this section.
LC7139/31, TC9106 (US), LC7135 (EEC)
| — | RX | TX |
|---|---|---|
| Ch. 1 | 3254 | 3345 |
| Ch. 2 | 3256 | 3347 |
| … | … | … |
| Ch. 22 | 3306 | 3397 |
| … | … | … |
| Ch. 40 | 3342 | 3433 |
TC9109 (US) Uniden chassis
| — | RX | TX |
|---|---|---|
| Ch. 1 | 3254 | 5393 |
| Ch. 2 | 3256 | 5395 |
| … | … | … |
| Ch. 40 | 3342 | 5481 |
LC7136, LC7137 (UK) Cybernet chassis
| — | RX | TX |
|---|---|---|
| Ch. 1 | 3381 | 2760 |
| Ch. 2 | 3383 | 2761 |
| … | … | … |
| Ch. 40 | 3459 | 2799 |
TC9119 (UK) Uniden chassis
| — | RX | TX |
|---|---|---|
| Ch. 1 | 3381 | 3472 |
| Ch. 2 | 3383 | 3474 |
| … | … | … |
| Ch. 40 | 3459 | 3550 |
PLL03A (US - AM), PLL08A (EEC - FM)
| — | RX | TX |
|---|---|---|
| Ch. 1 | 1206 | 1297 |
| Ch. 2 | 1208 | 1299 |
| … | … | … |
| Ch. 22 | 1258 | 1349 |
| … | … | … |
| Ch. 40 | 1294 | 1385 |